This application is based on and incorporates herein by reference Japanese patent application No. 2002-117603 filed on Apr. 19, 2002.
The present invention relates to a switched capacitor filter circuit and a method of fabricating the circuit. Specifically it relates to the switched capacitor filter circuit that can reduce feedthrough noise and the method of fabricating the circuit.
Various switched capacitor circuits are proposed.
A switched capacitor integration circuit shown in FIG. 10A is configured with an operational amplifier 403, an input capacitor 404, switching circuits 405, 406, and an integration capacitor 407. An input voltage Vin is inputted to an inverting input terminal of the operational amplifier 403 via the input capacitor 404 and the switching circuit 406, and an output terminal of the operational amplifier 403 is connected to the inverting input terminal via the integration capacitor 407.
The switching circuits 405, 406 simultaneously switch the ground potential and the signal path side with a switching control signal (not shown). The signal path side is the path extended to the inverting input terminal of the operational amplifier 403 via the input capacitor 404 from the input terminal to which the input voltage Vin is impressed. First, when the switches 405, 406 are connected to the ground, the input capacitor 404 is discharged. Next, the switching circuits 405, 406 are connected to the signal path side, the input voltage Vin is impressed to the switching circuit 405 of the input capacitor 404, and the input capacitor 404 is charged. When the switching circuits 405, 406 are switched to the ground, the input capacitor 404 is discharged.
Assuming that capacitance of the input capacitor 404 is C1 and an amount of charge stored in the input capacitor 404 is Q, the amount is expressed as Q=C1xc2x7Vin. Also assuming that a current flowing into the input capacitor 404 is ixe2x80x2, a switching frequency of a switching control signal (sampling frequency) is fs, and a switching period of the switching control signal is T=1 /fs. This current is expressed as ixe2x80x2=Qxc2x7fs=C1xc2x7Vinxc2x7fs=(C1xc2x7Vin)/T. As understood from this expression, due to the switching operations of the switching circuits 405, 406, the current ixe2x80x2 flows during a period of the switching control signal (not shown). Therefore this circuit may be considered as a resistor for the input signal of sufficiently lower frequency to the frequency fs of the switching control signal.
Assuming the switching circuit 405, capacitor 404, and switching circuit 406 in FIG. 10A are assumed to be equivalent to a resistor 401 of an analog integration circuit composed of an operational amplifier 400 and an integration capacitor 402 shown in FIG. 10B, that is, i=ixe2x80x2, the relationship of R=T/C1=1/(fsxc2x7C1) is obtained. Also, assuming that capacitance of the integration capacitor 407 in FIG. 10B is C2, cut-off frequency f0 is expressed as f0=1/(2xcfx80Rxc2x7C2)=(fsxc2x7C1)/(2xcfx80C2). As described above, the switched capacitor filter circuit is capable of controlling the cut-off frequency f0 with a capacitance ratio of the sampling frequency fs to the input capacitor 404 and integration capacitor 407. Therefore, unlike a large capacitor and an RC filter which are required to have a large scale capacitor or higher accuracy of capacitance, the switched capacitor filter circuit is suitable for integration.
The switched capacitor circuit is used for a first-order filter as shown in FIG. 11. This first-order filter is configured with switching transistors 100 to 107, an input capacitor 110, a limit capacitor 111, an integration capacitor 112, and an operational amplifier 113.
One terminal of the input capacitor 110 is connected to an input terminal IN via the switching transistor 100 and also connected to an internal reference voltage terminal REF (indicated as an inverted triangle) via the switching transistor 104, while the other terminal is connected to an inverting input terminal of the operational amplifier 113 via the second switching transistor 101 and also connected to the internal reference voltage terminal REF via the switching transistor 105. One terminal of the limit capacitor 111 is connected to the inverting input terminal of the operational amplifier 113 via the switching transistor 102 and is also connected to the internal reference voltage terminal REF via the switching transistor 106. The other terminal is connected to an output terminal OUT via the switching transistor 103 and also connected to the internal reference voltage terminal REF via the switching transistor 107. One terminal of the integration capacitor 112 is connected to the inverting input terminal of the operational amplifier 113. The other terminal is connected to an output terminal. It is assumed here that the voltage of input terminal IN is V1, the voltage of the inverting input terminal of the operational amplifier 113 is V2, and the output voltage of the operational amplifier 113 is V3.
With this configuration, the switching transistors 100 to 107 are turned on or off with switching control signals (control signals) xcfx861, xcfx862 shown in FIG. 12. The switching transistors 100 to 103 turn on when the control signal xcfx861 is high level, while the switching transistors 104 to 107 turn on when the control signal xcfx862 is high level.
When the control signal xcfx861 is low level and the control signal xcfx862 is high level, the input capacitor 110 is grounded via the switching transistors 104, 105, while the limit capacitor 111 is grounded via the switching transistors 106, 107 and are then discharged. Under this condition, when both control signals xcfx861, xcfx862 are in the low level state, the switching transistors 100 to 107 are all turned off, and thus no currents flow into the input capacitor 110 and the limit capacitor 111.
When the control signal xcfx861 becomes high level and the control signal xcfx862 becomes low level, the switching transistors 100 to 103 are turned on, so that a charging current flows into the input capacitor 110 depending on a voltage difference (V1xe2x88x92V2) applied across both terminals, and thereby the input capacitor 110 is charged up to the voltage depending on the voltage difference (V1xe2x88x92V2). Charging current flows into the integration capacitor 112 depending on a voltage difference (V2xe2x88x92V3) applied across both terminals and thereby the integration capacitor 112 is charged up to the voltage depending on the voltage difference (V2xe2x88x92V3).
When both control signals xcfx861, xcfx862 become low level, the switching transistors 100 to 103 are turned off, so that no currents flow into the input capacitor 110 and the limit capacitor 111.
As described above, the input capacitor 110 and the limit capacitor 111 become the circuit where predetermined current flows during a period of the control signals xcfx861, xcfx862. Therefore it may be considered to be equivalent respectively to resistors. The integration capacitor 112 is charged depending on the voltage difference (V2xe2x88x92V3) applied across both terminals thereof regardless of switching operations in the switching transistors 100 to 107.
The switched capacitor filter circuit in FIG. 11 can be thought, for an input signal of sufficiently lower frequency to the sampling frequency, to be equivalent to a first-order low pass filter as shown in FIG. 13. In this filter, the input capacitor 110 and its associated transistors 100, 101, 104 and 105 are represented as a resistor 120, while the limit capacitor 111 and its associated transistors 102, 103, 106 and 107 are represented as a resistor 130.
As a switched capacitor filter circuit of this type, a xe2x80x9cswitched capacitor filterxe2x80x9d is described in JP-A No. 11-205113.
In this switched capacitor filter circuit, feedthrough noise due to feedthrough capacitance sometimes give adverse effect on its filter characteristics. These feedthrough capacitance and feedthrough noise will be described below.
As illustrated in FIG. 14, a switching transistor has an overlapping area between the gate and drain or the gate and source. Small capacitances are formed in these overlapping areas, and are charged due to the change of a gate signal. These small capacitances are referred to as feedthrough capacitance. These feedthrough capacitances bring about feedthrough noise at the switching transistor in the switched capacitor filter circuit. Specifically, in the switching transistor in FIG. 15A, when a control signal xcfx86 in FIG. 15B is inputted under the condition that the input voltage Vin is low level, a voltage change is generated at an output voltage Vout due to the feedthrough capacitance of the switching transistor depending on the change of the control signal xcfx86. Noise appearing in such voltage change is referred to as the feedthrough noise.
Influence of this feedthrough noise will be described using an equivalent circuit of the switched capacitor filter in FIG. 16. This circuit is configured with a switching transistor 600, an input capacitor 601, an integration capacitor 602, and an operational amplifier 603. When the switching transistor 600 is switched with the control signal xcfx86 to be inputted to the gate of the switching transistor 600, feedthrough noise is generated due to the feedthrough capacitance of the switching transistor 600 at the inverting input terminal of the operational amplifier 603, so that this feedthrough noise is outputted as an offset voltage to an output voltage Vout at the output terminal via the integration capacitor 602.
Assuming that the feedthrough capacitance of the switching transistor 600 is Ce, capacitance of the integration capacitor 602 is Cf, voltage impressed to the gate of the switching transistor 600 is V; feedthrough noise Vnoise is expressed as follows.
xe2x80x83Vnoise=(Cexc2x7V)/Cf
From this expression, it can be understood that feedthrough noise Vnoise is proportional to a ratio Ce/Cf of the feedthrough capacitance Ce to capacitance Cf. The feedthrough noise is as small as to be negligible when capacitance Cf of integration capacitor is sufficiently larger than feedthrough capacitance Ce. However, when capacitance Cf of the integration capacitor is not sufficiently larger than the feedthrough capacitance Ce, the feedthrough noise becomes larger and the offset voltage due to the feedthrough noise increases, causing the filter characteristic to be deteriorated.
Assuming that unit capacitance to form a switched capacitor filter is C, sampling frequency is f, and capacitance of a capacitor is Cf, the cutoff frequency fc is expressed as follows.
fc=(Cxc2x7f)/(2xcfx80xc2x7Cf)
From the above expressions, feedthrough noise Vnoise is expressed as follows.
Vnoise=(2xcfx80xc2x7fcxc2x7Cexc2x7V)/(Cxc2x7f)
From this expression, it can be understood that feedthrough noise Vnoise depends on the capacitance Cf of capacitor, cutoff frequency fc, and ampling frequency f.
FIG. 17 illustrates simulation result for cutoff frequency in the amount of feedthrough noise. This figure illustrates both characteristics of second-order filters when the sampling frequency f is 60 kHz and 120 kHz, and characteristics of a first-order filter when the sampling frequency f is 60 kHz. When the second-order filters in the figure are compared with each other for the sampling frequency f of 120 kHz and cutoff frequency fc of 400 Hz, and the sampling frequency f of 60 kHz, and cutoff frequency fc of 400 Hz, it can be understood that the feedthrough noise of the latter becomes two times the feedthrough noise of the former. If the second-order filters are compared with each other for the frequencies of f=120 kHz and fc=400 Hz, and the frequencies of f=60 kHz and fc=200 Hz, it can also be understood that the feedthrough noise is identical for both filters. However, the cutoff frequency fc of the former filter becomes two times the cutoff frequency of the latter filter.
The feedthrough noise of the first-order filter, whose sampling frequency f is 60 kHz, is different from the characteristics of the second-order filter, whose sampling frequency f is 60 kHz. This is because two switching transistors which generate feedthrough noise are provided. In the first-order filter of FIG. 11, feedthrough noise is generated by the switching operations of two switching transistors 101, 102, and it is then outputted as an offset voltage to the output terminal OUT via the integration capacitor 112.
It is an object of the present invention to reduce feedthrough noise in a switched capacitor filter circuit.
In order to achieve the object, according to one aspect of the present invention, in a switched capacitor filter circuit, a first noise compensation transistor is provided in series to a second transistor located at an input terminal side of an operational amplifier for a first and a second transistors allocated at both sides of an input capacitor. This first noise compensation transistor receives, at its gate, a signal in the inverse polarity of the switching control signals inputted to the first and second switching transistors, and cancels feedthrough noise generated in the second switching transistor. Accordingly, this feedthrough noise can be reduced.
According to another aspect of the present invention, a switched capacitor filter circuit is configured as a high-order (higher than the second-order) switched capacitor filter circuit. In this case, feedthrough noise generated by the second switching transistor can be cancelled by providing the first noise compensation transistor in series to the second transistor located at the input terminal side of the operational amplifier for the first and second transistors provided in both sides of the input capacitor in the circuit of the final stage.
According to a further aspect of the invention, a method of fabricating the switched capacitor filter circuit is configured such that, when a ratio of feedthrough capacitance of switching transistor to capacitance of integration capacitor is larger than the predetermined value, wirings to the noise compensation transistor are formed, while when such capacitance ratio is not larger than the predetermined value, such wirings are not formed.
According to the invention, connection or non-connection of noise compensation transistor may be determined only by changing wiring patterns through application of the wiring forming process.